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URL: http://github.com/intel/torch-xpu-ops/pulls

99a2fb35f.css" /> Pull requests · intel/torch-xpu-ops · GitHub
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Pull requests: intel/torch-xpu-ops

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Pull requests list

[WIP] Support sampled_addmm in SparseCsrXPU
#3018 opened Mar 10, 2026 by jenniew Loading…
Fix few clang-tidy checks
#3005 opened Mar 6, 2026 by Silv3S Loading…
[SYCLTLA] rebase FA2 fwd to latest version
#2998 opened Mar 6, 2026 by LuFinch Loading…
WIP Remove -fsycl-host-compiler, use pure icpx compilation windows_ci Only for Windows CI trigger
#2994 opened Mar 5, 2026 by chunhuanMeng Loading…
Support xpu graph capture for XCCL
#2992 opened Mar 5, 2026 by Chao1Han Loading…
Skip test_sync_warning on XPU
#2986 opened Mar 4, 2026 by pbielak Loading…
Implement addmm for XPU sparse compressed tensors
#2974 opened Mar 3, 2026 by lchen2331 Loading…
[CI] Use BMG for CI test to replace PVC
#2970 opened Mar 3, 2026 by mengfei25 Loading…
addmv for SparseCsr XPU
#2909 opened Feb 22, 2026 by jenniew Loading…
[WIP] Build separate op on Windows windows_ci Only for Windows CI trigger
#2902 opened Feb 19, 2026 by PawelSwider2000 Loading…
ProTip! What’s not been updated in a month: updated:<2026-02-11.
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